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Active Keyword: ASIC Design Engineer Technical Lead Remove filter Location: San Jose Remove filter Clear all

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ASIC Design Engineer Technical Lead

Cisco

San Jose, CA 91 days ago $186,900–$267,700
Actively hiring Confirmed live today Low trust Above market
ASIC Design Verilog System Verilog Python Perl TCL Shell Programming RTL Micro-architecture Tape-out post silicon validation Simulation
8+ yrs exp
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