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Active Keyword: ASIC DFT Engineer Remove filter Location: San Jose Remove filter Clear all

5 of up to 20 (filtered)

ASIC DFT Engineering Technical Leader

Cisco

San Jose, CA +2 5 days ago $186,900–$267,700
Actively hiring Confirmed live today Posted this week High trust Above market
ASIC Implementation Design-for-Test ATPG Tessent TestMax Tetramax Verilog Gate Level Simulation VCS SDF Scan Insertion JTAG Tcl Python Perl Static Timing Analysis Post-Silicon Validation
8+ yrs exp Hybrid
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ASIC DFT STA Engineer

Cisco

San Jose, CA 5 days ago $167,700–$245,200
Actively hiring Confirmed live today Posted this week High trust Competitive pay
STA DFT RTL Design CDC RDC SDC Python TCL Perl Makefile Tessent PCIE BIST Scan Shift/Capture Conformal Verification
7+ yrs exp
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Senior ASIC DFT DV Engineer

Cisco

San Jose, CA +1 13 days ago $167,700–$245,200
Actively hiring Confirmed live today High trust Competitive pay
System Verilog UVM Python TCL Perl Verdi DVE JTAG MBIST DFT Scan Architecture Boundary Scan ATE post silicon validation
7+ yrs exp Hybrid
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Senior ASIC DFT DV Engineer

Cisco

San Jose, CA 14 days ago $167,700–$245,200
Actively hiring Confirmed live today High trust Competitive pay
DFT MBIST ATE Verilog Python TCL Perl DVE Verdi SRAM DRAM Synopsys DesignWare SMS TestMax Mentor Graphics Tessent
7+ yrs exp Hybrid
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ASIC DFT Engineer

Cisco

San Jose, CA 15 days ago
Actively hiring Confirmed live today High trust
DFT Verilog System Verilog ATPG JTAG Scan BIST VCS TestMax Tetramax Tessent PrimeTime Gate Level Simulation Post-Silicon Validation ATE P1687 Static Timing Analysis RTL EDA Tools
3+ yrs exp Hybrid
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