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Active Keyword: CAD Engineer Remove filter Location: San Francisco Remove filter Clear all

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CAD Engineer - Design Verification Methodology

Apple Inc

San Francisco, CA 148 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday Low trust Above market
Python TCL Perl Verilog SystemVerilog VHDL Synopsys VCS Xcelium ModelSim Verdi Indago C C++ Makefile RTL Machine Learning Artificial Intelligence
3+ yrs exp
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CAD Engineer - Design Verification Methodology

Apple Inc

San Francisco, CA 149 days ago $184,700–$324,800
Actively hiring Confirmed live 2 days ago Low trust Above market
Python TCL Perl Verilog SystemVerilog VHDL VCS Xcelium Modelsim Cadence Synopsys Verdi Indago C C++ Machine Learning RTL
10+ yrs exp
Save