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Active Keyword: ASIC Design Verification Technical Leader Remove filter Location: Carlsbad Remove filter Clear all

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ASIC Design Verification Technical Leader

Cisco

Carlsbad, CA +1 32 days ago $166,300–$238,300
Actively hiring Confirmed live yesterday High trust Competitive pay
System Verilog UVM ASIC Design Verification Python Perl TCL Shell Scripts Verilog Formal Verification Veloce HAPS Ethernet UCIE UAL SPI I2C SerDes D2D PHY ODSP
8+ yrs exp
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