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ASIC Design and Integration Engineer

Apple Inc

Beaverton, OR 53 days ago
Actively hiring Verified listing
SystemVerilog RTL design synthesis timing analysis PCIe CDC RDC LINT LEC low-power design techniques FPGA prototyping high-speed I/O design power optimization

ASIC Design and Integration Engineer

Apple Inc

Beaverton, OR 53 days ago
Actively hiring Verified listing
SystemVerilog RTL design synthesis timing analysis PCIe CDC RDC LINT LEC low-power design techniques FPGA prototyping

ASIC Design and Integration Engineer

Apple Inc

Beaverton, OR 53 days ago
Actively hiring Verified listing
SystemVerilog RTL design synthesis timing analysis PCIe CDC RDC LINT LEC low-power design techniques FPGA prototyping custom ASIC design