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Senior RTL Design Engineer, DDR/LPDDR Memory Controller

Amd

Austin, TX +2 85 days ago $178,400–$267,600
Actively hiring Confirmed live today High trust Above market
RTL Design Verilog SystemVerilog Python Perl Tcl Digital Logic Design Computer Architecture DDR LPDDR EDA Tools Lint CDC Timing Analysis Synthesis Simulation Verification
Hybrid