Browse tech roles

Filter the feed by workplace, employment type, salary floor, and post age. For ranked matching against your resume, use AI Match.

Active Keyword: Senior ASIC Design Engineer Remove filter Location: Austin Remove filter Clear all

3 of up to 20 (filtered)

Senior ASIC Design Engineer – Clocks IP

Nvidia

Santa Clara, CA 16 days ago $136,000–$218,500
Actively hiring Verified listing Competitive pay
Verilog Python RTL Logic Synthesis CI/CD Sub-micron Silicon Issues Clocking Networks Clocks Controller Power Optimization Noise Analysis Cross-talk OCV Effects Scalable Designs Silicon Debug
Hybrid
Save

Senior ASIC Floorplan Design Engineer

Nvidia

Santa Clara, CA 16 days ago $196,000–$310,500
Actively hiring Verified listing Above market
Verilog SystemVerilog Python Perl C++ CAD VLSI ComputerArchitecture ChipFloorplan PowerClockDistribution Packaging P&R TimingClosure
Save

Senior ASIC Design Engineer - Hardware

Nvidia

Austin, TX 17 days ago $136,000–$218,500
Actively hiring Verified listing Competitive pay
Python Perl Verilog SystemVerilog dc_shell VCS Debussy GDB Kubernetes Terraform CI/CD Git Unix/Linux
Hybrid
Save