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Interconnect Micro-architect/RTL Design Engineer

Amd

Austin, TX 2 days ago $178,400–$267,600
Actively hiring Confirmed live today Posted this week High trust Above market
Verilog System Verilog RTL Design C C++ Python Perl x86 ARM ISA NoC Cache DFT Digital Electronics High-Speed Design
Hybrid

Interconnect Micro-architect/RTL Design Engineer

Amd

Austin, TX 87 days ago $178,400–$267,600
Actively hiring Confirmed live today High trust Above market
Verilog SystemVerilog RTL Design Network-on-Chip NoC Microarchitecture x86 ARM Python C C++ Digital Design DFT
Hybrid