Staff Engineer, Compiler

Samsung Semiconductor

Confirmed live 2 days ago High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$163,000–$253,000 / yr
Posted
101 days ago
Freshness
Confirmed live 2 days ago

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $212k
This role $208k
$149k most similar roles pay here $271k

This role pays less than 53% of similar roles. Most pay $185,300–$238,250 — the shaded band above. At the midpoint, this role pays about $208k versus about $212k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 49 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 49 roles with salary data.

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At a glance

TL;DR · Staff Engineer, Compiler

Staff Engineer, Compiler joins the AGI Computing Lab to address complex system-level challenges for AI/ML workloads. This role focuses on developing scalable platforms that manage high computational and memory requirements while optimizing performance and energy consumption. You will adapt torch.compile to the internal backend by lowering Inductor's IR, building or extending kernel DSLs like Triton or Helion, and designing placement and scheduling passes for distributed memory models. Key responsibilities include implementing parallelism-aware lowering, fusion, tiling, and memory planning for non-uniform memory hierarchies. The role requires expertise in MLIR, XLA, TVM, Inductor, IREE, or CUTLASS, along with experience building PyTorch backends for non-CUDA accelerators. You will also contribute to open-source projects including PyTorch, Triton, and LLVM/MLIR. This position solves critical bottlenecks in executing large-scale AI models across diverse hardware components.

What does a Engineer earn in California?

Median $208000 from 94 postings across 22 companies.

See salary data

What you'll do

  • Adapt torch.compile to the company's backend by lowering Inductor's IR and defining fusion and specialization rules.
  • Build or extend kernel DSLs for hardware using tile-based programming models or custom high-level expressions.
  • Design placement and scheduling passes to manage tensor locations, migrations, and compute/data movement overlap.
  • Implement parallelism-aware lowering for tensor, pipeline, expert, and sequence parallelism within the compiler IR.
  • Solve fusion, tiling, and memory planning problems for non-uniform memory hierarchies.
  • Contribute code to upstream open-source projects including PyTorch, Triton, Helion, and MLIR.

What we're looking for

  • Bachelor’s degree with 10+ years, Master’s with 8+ years, or PhD with 5+ years of industry experience.
  • 3 to 5+ years of experience in Triton, Helion, MLIR, XLA, TVM, Inductor, IREE, CUTLASS, or equivalent.
  • Experience designing a kernel DSL or its IR from scratch or making non-trivial language-level changes to an existing one.
  • Experience with MLIR including writing dialects, passes, or backend integration.
  • Experience building PyTorch backends for non-CUDA accelerators such as XPU, ROCm, MPS, or TPU.
  • Experience with kernel autotuning, performance modeling, or cost-based compilation.
  • Background in HPC, distributed systems, or NUMA-aware programming to build intuition for non-flat memory.
  • Open-source contributions to PyTorch, Triton, Helion, LLVM/MLIR, or similar projects are preferred.

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