Sr. ASIC Design Verification Engineer (Silicon Engineering)
SpaceX
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How this pay compares to similar roles
This role pays more than 58% of similar roles. Most pay $158,850–$216,250 — the shaded band above. At the midpoint, this role pays about $198k versus about $188k for comparable roles.
Based on 240 similar postings.
Employer
SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.
SpaceX currently has 604 open roles on FindRole.
Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.
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At a glance
As a Senior ASIC Design Verification Engineer at Silicon Engineering in Redmond, WA, you will join a dynamic team focused on developing cutting-edge semiconductor solutions. Your primary responsibilities include designing and implementing verification methodologies for complex ASICs, creating testbenches, and writing scripts to automate the testing process. You will work closely with design engineers to ensure comprehensive coverage of functional and performance requirements. The role requires proficiency in Python for automation, as well as expertise in SystemVerilog and UVM (Universal Verification Methodology). Ideal candidates should have a strong background in electrical or computer engineering, with experience in large-scale silicon projects that demand meticulous verification strategies.
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