Sr. ASIC Design Verification Engineer (Silicon Engineering)
SpaceX
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How this pay compares to similar roles
This role pays more than 67% of similar roles. Most pay $158,850–$216,250 — the shaded band above. At the midpoint, this role pays about $205k versus about $188k for comparable roles.
Based on 240 similar postings.
Employer
SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.
SpaceX currently has 604 open roles on FindRole.
Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.
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At a glance
The Senior ASIC Design Verification Engineer role at Silicon Engineering in Sunnyvale, CA involves designing and verifying complex integrated circuits for high-performance computing systems. This senior-level position requires expertise in creating comprehensive test plans, developing verification environments using UVM, and automating tasks with Python scripts to ensure efficient testing processes. Candidates should have a strong background in electrical or computer engineering, along with hands-on experience in SystemVerilog, UVM, and Python for automation. The ideal candidate will work on cutting-edge ASIC projects that demand rigorous verification methodologies to meet stringent performance and reliability standards at scale.
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