Design Verification Engineer (Silicon Engineering)

SpaceX

Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$135,000–$155,000 / yr
Posted
today

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $181k
This role $145k
$125k most similar roles pay here $231k

This role pays less than 82% of similar roles. Most pay $153,100–$208,900 — the shaded band above. At the midpoint, this role pays about $145k versus about $181k for comparable roles.

Based on 240 similar postings.

Employer

About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 604 open roles on FindRole.

Listed pay typically runs $130,000–$155,000 across 440 roles with salary data.

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At a glance

TL;DR · Design Verification Engineer (Silicon Engineering)

The Design Verification Engineer role at Silicon Engineering in Sunnyvale, CA is a mid-level position focused on developing and maintaining test benches for design verification using UVM methodologies. The ideal candidate will work closely with the engineering team to ensure robust verification of complex silicon designs through automation scripts primarily written in Python. Key responsibilities include creating comprehensive test plans, implementing verification environments, and debugging issues within the verification framework. Candidates should have a bachelor’s degree in electrical engineering, computer science, or a related field along with 1+ years of experience in design verification and test bench development. The role requires expertise in UVM, strong scripting skills in Python, and an understanding of digital design principles to tackle large-scale silicon validation challenges.

What you'll do

  • Develop and maintain test benches for design verification.
  • Implement verification methodologies such as UVM in verification processes.
  • Automate tasks using Python to enhance efficiency in testing.
  • Conduct functional verification of designs to ensure compliance with specifications.
  • Analyze simulation results to identify and debug issues in hardware designs.

What we're looking for

  • Bachelor’s degree in electrical engineering, computer science, or computer engineering
  • 1+ years of experience with design verification and test bench development
  • Experience with UVM verification methodologies
  • Proficiency in Python for automation tasks
  • Eligibility to work under ITAR regulations for U.S. Department of State requirements

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