PhD Large Language Model Engineer Co-op

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$91,520–$137,280 / yr
Employment
Intern
Posted
6 days ago
Freshness
Confirmed live today
Closes
Oct 5, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $178k
This role $114k
$73k $260k
below market most similar roles pay here above market

This role pays less than 73% of similar roles. Most pay $114,400–$241,750 — the blue band above. At the midpoint, this role pays about $114k versus about $178k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 510 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 510 roles with salary data.

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At a glance

TL;DR · PhD Large Language Model Engineer Co-op

The Spring/Summer 2027 PhD Large Language Model Engineer Co-op joins the research and engineering teams to advance the efficiency, scalability, and performance of large language model training and inference on modern hardware architectures. The intern will conduct research on scalable training, develop distributed training frameworks, and explore hardware-aware optimizations like quantization and sparsity-aware computation. Key responsibilities include implementing and benchmarking state-of-the-art ML system optimizations and collaborating on publications for top-tier conferences. Required skills include proficiency in Python and C++, experience with PyTorch, TensorFlow, or JAX, and knowledge of GPUs, ASICs, and distributed training paradigms like FSDP, ZeRO, and Megatron-LM. The role requires expertise in HPC techniques including MPI, CUDA, and AI compiler optimizations such as Triton, XLA, and MLIR.

What you'll do

  • Conduct research on scalable training and inference of large language models using ML systems and HPC techniques.
  • Develop and optimize distributed training frameworks and model parallelism strategies for large-scale AI workloads.
  • Explore hardware-aware optimizations including quantization, sparsity-aware computation, and memory-efficient techniques.
  • Implement and benchmark state-of-the-art ML system optimizations using high-performance computing techniques.
  • Perform algorithm-hardware co-optimization to enhance the efficiency and performance of LLMs on modern hardware.
  • Collaborate with research and engineering teams to publish findings in top-tier academic conferences.

What we're looking for

  • Currently pursuing a PhD in Computer Science, Electrical Engineering, or a related field focusing on ML Systems, HPC, or AI Infrastructure.
  • Strong background in machine learning, distributed systems, and parallel computing.
  • Experience with deep learning frameworks such as PyTorch, TensorFlow, or JAX and large-scale model training.
  • Proficiency in Python and C++ with experience in performance profiling and optimization.
  • Knowledge of GPUs, ASICs, and distributed training paradigms like FSDP, ZeRO, DeepSpeed, or Megatron-LM.
  • Familiarity with HPC techniques including MPI, Rcom/CUDA, RCCL/NCCL, and high-speed networking technologies.
  • Prior research experience in scalable deep learning systems, large-scale LLM training, or AI acceleration.
  • Experience with AI compiler optimizations such as Triton, XLA, or MLIR.

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