PhD Machine Learning System Engineering Intern/Co-op

Amd

Confirmed live today High trust

Hybrid

Quick summary

Work type: Hybrid
Location: San Jose, CASanta Clara, CA
Salary: $91,520–$137,280 / yr
Employment: Intern
Posted: 3 days ago
Freshness: Confirmed live today
Closes: Sep 11, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $204k

This role $114k

$71k most similar roles pay here $286k

This role pays less than 79% of similar roles. Most pay $153,343–$254,750 — the shaded band above. At the midpoint, this role pays about $114k versus about $204k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 379 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 379 roles with salary data.

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At a glance

TL;DR · PhD Machine Learning System Engineering Intern/Co-op

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The 2027 PhD ML System Engineering Intern/Co-op joins the engineering team to optimize large language models and vision language models on the Ryzen AI NPU. The primary responsibilities include analyzing time and memory usage, proposing architectural changes, and writing and tuning AIE kernels using IRON to optimize dominant operators like GEMM, attention, normalization, and activation functions. Candidates will also present findings to the broader engineering organization. Required skills include proficiency in Python and C++, experience with compilers involving graph lowering, operator fusion, scheduling, tiling, and memory planning, and a deep understanding of LLM and VLM architectures such as KV cache and vision encoder fusion. The role focuses on solving performance bottlenecks by analyzing compute-bound versus memory-bound behavior on hardware while exploring how transformers map onto tiled dataflow accelerators and production AI compilers.

Skills

LLM VLM Python C++ IRON MLIR GEMM Memory Planning Operator Fusion Graph Lowering Profiling AMD AI Engine (AIE)

What you'll do

Analyze time and memory usage of LLMs and VLMs on the Ryzen AI NPU.
Propose specific architectural or software changes to improve model performance.
Write and tune AIE kernels using IRON to optimize dominant LLM runtime operators.
Optimize critical operations including GEMM, attention, normalization, and activation functions.
Profile code to distinguish between compute-bound and memory-bound behaviors on real hardware.
Document technical findings and learnings for the engineering organization to build upon.
Present project results and findings to the wider engineering organization at the end of the term.

What we're looking for

You must be currently pursuing a PhD in Computer Science, Computer Engineering, or Electrical Engineering.
You must have a strong understanding of LLM and VLM architectures, including attention, KV cache, and vision encoder fusion.
You must have experience with compilers, specifically graph lowering, operator fusion, scheduling, tiling, and memory planning.
You must be proficient in Python and C++.
You must be able to profile code to distinguish between compute-bound and memory-bound behavior.
Experience with MLIR is preferred.
Familiarity with AMD AI Engine (AIE) architecture or experience writing kernels/dataflow designs with IRON is preferred.

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