As a Senior Power Architecture & Optimization Engineer at NVIDIA, you will join a cutting-edge team focused on developing the most energy-efficient GPUs and SoCs. Your daily work will involve analyzing full-chip and unit-level power using advanced tools like PowerArtist and PrimePower, translating data into actionable design improvements, and developing ML/RL-based models for anomaly detection and dynamic power management. You’ll also train large language models to assist engineers in interpreting complex power data and recommending optimizations. Additionally, you will collaborate closely with cross-functional teams to drive power-efficient design changes, prototype new architectural features in Verilog, and automate workflows using Python, Perl, and C++. This role requires a strong background in energy consumption, low-power design, and experience with machine learning and reinforcement learning, particularly in the context of EDA and system-level optimization.
Analyze full-chip and unit-level power using advanced tools to identify design improvements.
Develop and deploy ML/RL-based models for anomaly detection and dynamic power management.
Train LLMs to assist engineers in interpreting complex power data and proposing optimizations.
Conduct comparative power analysis across workloads to uncover optimization opportunities.
Prototype new architectural features focusing on their power and energy implications.
Automate flows using Python, Perl, C++ to fast-track power anomaly detection and model integration.
Apply AI to recommend or automatically tune power-efficient configurations for design decisions.
What we're looking for
MS (or equivalent) in EE/CE/CS with 5+ years or PhD with 3+ years of relevant experience.
Strong expertise in energy consumption, power estimation, data movement, and low-power design principles.
Hands-on experience with Verilog and ASIC design tools like PowerArtist, PrimePower, RTL Architect.
Proficient coding skills in Python, Perl, C++ for automation and scaling power analysis flows.
Experience or strong interest in applying machine learning, reinforcement learning to EDA and system optimization.
Familiarity with building and using LLMs as engineering copilots for EDA/power/architecture workflows.
Market check
Salary context
This
$136,000–$218,500
range sits above
62%
of similar postings on FindRole.
Peer median band
$136,000–$210,665
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$142,475–$207,093
Middle half of comparable postings.
Based on 240 comparable postings.*
* 240 is the maximum number of comparable postings sampled.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
801 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 797 roles with salary data.
Us, Ca, Santa Clara, US16 days ago
$168,000–$264,500
Python
AI
ML
EDA
LLMs
Data Science
Power Modeling
Transistor Device Physics
System-Level Optimization
Silicon Validation
HW-SW Co-Design
CPU/GPU/SoC Architecture
Codesign Engineering
Post-Silicon Bring-Up
Frequency and Power Characterization