Senior GPU System Architect, Context Management and Register Architecture

Nvidia

Confirmed live today High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $184,000–$287,500 / yr
Employment: Full-time
Posted: 12 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $226k

This role $236k

$162k $301k

below market most similar roles pay here above market

This role pays more than 68% of similar roles. Most pay $196,750–$254,750 — the blue band above. At the midpoint, this role pays about $236k versus about $226k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior GPU System Architect, Context Management and Register Architecture

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The Senior GPU System Architect, Context Management and Register Architecture joins the team to define foundational GPU mechanisms for managing execution state and register address architecture. This hands-on role involves architecting GPU context-management for saving and restoring execution states while owning the GPU-wide register address map. The architect coordinates address allocation, resolves conflicts, and defines requirements for on-die and cross-die interconnects. Key responsibilities include developing C++ functional-model support, evaluating tradeoffs across performance and reliability, and building validation strategies for silicon bring-up. The role requires proficiency in C++ and Python to collaborate across ASIC, firmware, driver, and performance teams. The work focuses on ensuring GPU responsiveness, scalability, and software compatibility by managing how increasingly sophisticated processors are configured and managed across multiple product iterations.

Skills

GPU Architecture C++ Python Hardware Verification Firmware Device Drivers RISC-V Pre-silicon Validation Silicon Bring-up Memory-mapped I/O Functional Modeling Performance Modeling On-chip Interconnects Context Switching Virtualization

What you'll do

Architect and evolve GPU context-management mechanisms for saving and restoring execution state.
Own the GPU-wide register address map and coordinate address allocation across product iterations.
Define requirements for on-die and cross-die interconnects for register access and programming.
Develop C++ functional-model support to translate architectural requirements into coordinated hardware solutions.
Evaluate architectural tradeoffs across performance, area, complexity, scalability, and reliability.
Build validation strategies and debug cross-stack issues through pre-silicon and initial silicon testing.
Improve tools and automation supporting register-interface development and architectural compatibility.

What we're looking for

Bachelor’s degree in Computer Engineering, Computer Science, Electrical Engineering, or a similar field, or equivalent experience.
5+ years of proven experience in computer architecture, GPU architecture, CPU architecture, system-on-chip design, or a related area.
Experience designing, modeling, or validating sophisticated hardware features from definition through confirmation.
Proficiency in C++ and Python or a comparable scripting language.
Strong understanding of interactions among hardware, firmware, and system software with the ability to diagnose cross-layer issues.
Experience developing coherent architectural standards and technical specifications while collaborating with distributed, cross-functional groups.
Experience with hardware register architecture, address-map development, memory-mapped I/O, or device-control interfaces (preferred).
Knowledge of context switching, scheduling, virtualization, or execution-state management (preferred).

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