Senior Engineer, Performance Architecture

Samsung Semiconductor

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$138,000–$206,000 / yr
Posted
today

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $185k
This role $172k
$128k most similar roles pay here $231k

This role pays less than 54% of similar roles. Most pay $149,637–$221,000 — the shaded band above. At the midpoint, this role pays about $172k versus about $185k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 54 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 54 roles with salary data.

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At a glance

TL;DR · Senior Engineer, Performance Architecture

The Senior Engineer, Performance Architecture role is part of the AGICL lab within DSRA, focusing on designing and optimizing next-generation AI systems through advanced hardware-software co-design. This senior-level position involves modeling architecture, performance, and power characteristics for Memory Centric Computing platforms, developing high-performance computing models, and analyzing trade-offs to meet user requirements. The ideal candidate will have a strong background in computer architecture and experience with silicon development or high-performance computing optimization. Proficiency in relevant technologies and tools is essential, as is the ability to collaborate effectively across teams and communicate findings to stakeholders. This role addresses critical challenges in AI/ML workloads and emerging memory-centric architectures at scale.

What you'll do

  • Model the architecture, performance, and power characteristics of Memory Centric Computing platforms.
  • Develop and optimize models to explore a large design space in high-performance computing systems.
  • Analyze trade-offs within design spaces for different architectural choices and workloads.
  • Ensure that the PPA (Performance, Power, Area) metrics of modeled systems meet user requirements.
  • Conduct research on emerging technologies and trends in AI/ML workloads and Memory Centric Computing architectures.

What we're looking for

  • BS in Computer/Electrical Engineering or CS with 5+ years of silicon development experience, MS with 3+, or PhD preferred.
  • Strong background in computer architecture and experience in developing high-performance computing models.
  • Experience in optimizing models to explore large design spaces for Memory Centric Computing platforms.
  • Ability to analyze trade-offs within a design space considering various architectural choices and workloads.
  • Collaborative skills to ensure performance, power, and area (PPA) of modeled systems meet user requirements.

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