As a Senior Circuit Methodology Engineer, you will join our dynamic semiconductor design team to architect and develop new tools while enhancing existing ones to support mixed-signal project management and circuit deliverable tracking. Your daily tasks include collaborating with software teams to integrate AI/ML capabilities into the tool ecosystem, ensuring robustness and alignment with evolving methodologies. You will drive tool integration across departments such as circuit design, verification, VLSI, and CAD to streamline workflows and reduce tapeout cycle times. Additionally, you will establish guidelines for tool usage, including documentation and training processes, and implement telemetry to measure adoption and impact on schedule and quality. Ideal candidates have a BSEE or equivalent experience with 5+ years in circuit design methodology, CAD/EDA development, and AI integration into tools, along with a strong understanding of mixed-signal design flows and EDA ecosystems.
Skills
Python
Java
C++
AI/ML
EDA tools
Kubernetes
Docker
CI/CD
Git
Linux
PostgreSQL
MongoDB
Jenkins
Prometheus
Grafana
AWS
Azure
Google Cloud Platform
VLSI
CAD
What you'll do
Develop new in-house tools for mixed-signal project tracking and cell specification.
Integrate AI/ML capabilities into the tool ecosystem to enhance functionality.
Improve and maintain existing internal applications for robustness and alignment with evolving methodologies.
Define and drive tool integration across multi-department flows to streamline processes.
Establish guidelines and support processes for tool usage, including onboarding and training.
Measure adoption and impact of tools through telemetry and metrics implementation.
Ensure methodology tools improve mixed-signal build quality through better specifications and traceability.
What we're looking for
5+ years of experience in circuit design methodology, CAD/EDA development, or internal tools engineering for semiconductor flows.
Skilled in architecting and developing new in-house tools to support mixed-signal project tracking and cell specification.
Experience with AI algorithms and their integration into EDA tool ecosystems is preferred.
Strong understanding of mixed-signal or analog/RF design flows and corresponding EDA ecosystem.
Background in process/flow engineering aimed at reducing tapeout schedules and improving design quality.
Responsible for establishing guidelines, documentation, training, and support processes for methodology tools.
Market check
Salary context
This
$136,000–$218,500
range sits above
60%
of similar postings on FindRole.
Peer median band
$135,800–$217,250
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$144,500–$202,300
Middle half of comparable postings.
Based on 240 comparable postings.*
* 240 is the maximum number of comparable postings sampled.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
801 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 797 roles with salary data.
Us, Ca, Santa Clara, US119 days ago
$168,000–$264,500
Spice
Python
Perl
Tcl
Make
RTL
Logic Synthesis
Verification
Auto Place and Route
STA
PnR
DRC
LVS
Power Gating
Multi-Vt
Post-Silicon Characterization
Custom Circuit Design
Semi-Custom Circuit Design
Altium Designer
Python
MATLAB
C
Xilinx FPGAs
Vivado IDE
USB 3.0
10Gb Ethernet
I2C
RS232
FCC
CE Mark
MIL-STD-461
DMM
Oscilloscope
Logic Analyzer
Spectrum Analyzer