Senior Applied AI Engineer, Manufacturing & System Co-Design

Nvidia

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Hybrid

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Work type
Hybrid
Location
Santa Clara, CA
Employment
Full-time
Posted
34 days ago
Freshness
Confirmed live today

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

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TL;DR · Senior Applied AI Engineer, Manufacturing & System Co-Design

The Senior Applied AI Engineer, Manufacturing & System Co-Design joins the Silicon Co-Design Group to lead the methodology and infrastructure maintaining alignment between system specifications and manufacturing test specifications. Working within the System–Manufacturing Architecture team, you will develop production-grade Python pipelines and automated checks to detect specification drift across GPU, SoC, and CPU programs. Key responsibilities include defining manufacturing spec schemas, integrating tooling into agent-ready harnesses with CLIs and MCPs, and driving cross-org adoption of workflows across Design, Operations, and DFX teams. You will utilize Python and systems engineering skills to build infrastructure that ensures system intent matches manufacturing reality. This role solves the technical problem of preventing yield loss and performance issues by ensuring holistic, systematic alignment from pre-silicon POR through production release.

What you'll do

  • Define manufacturing specification types, schemas, and semantics derived from system PORs and features.
  • Own the methodology for structuring, versioning, and validating specification work across the program lifecycle.
  • Develop production-grade Python pipelines and automated checks to detect specification drift before silicon production.
  • Integrate SMAC work into end-to-end program milestones, gates, and artifacts with TPM-driven attestation.
  • Build agent-ready tooling including CLIs, MCPs, and evaluation-based CI gates for silicon workflows.
  • Drive cross-organizational adoption of SMAC methodologies and tooling across Post Silicon, Operations, and DFX teams.
  • Design infrastructure to ensure alignment between system intent and manufacturing reality across all GPU, SoC, and CPU programs.

What we're looking for

  • BS, MS, or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or Systems Engineering.
  • 8+ years of experience in system software, silicon bring-up, or productization engineering.
  • Strong Python and systems skills with experience shipping production services and data pipelines.
  • Deep understanding of the spec ecosystem, including system POR, guard-bands, manufacturing screen specs, and test insertion constraints.
  • Proven track record of cross-org influence and driving adoption of methodologies and workflows.
  • Ability to read silicon and productization outputs such as speed, power, and binning.
  • Experience standing up a cross-org workflow from scratch and shipping automation that survived adoption across resistant partners (preferred).
  • Experience building LLM-backed tools for subject matter experts (preferred).

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