Senior AI Performance Architect

Qualcomm

Quick summary

Work type: On-site
Location: Raleigh, NC · Santa Clara, CA · San Diego, CA
Salary: $126,700–$217,900 / yr
Posted: 139 days ago
Closes: Jul 17, 2026
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $219k

This role $172k

$110k most similar roles pay here $279k

This role pays less than 80% of similar roles. Most pay $192,006–$246,150 — the shaded band above. At the midpoint, this role pays about $172k versus about $219k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 558 open roles on FindRole.

Listed pay typically runs $154,000–$231,000 across 401 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · Senior AI Performance Architect

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As an AI Accelerator Architecture Engineer at Qualcomm Technologies, you will join a team of experts dedicated to advancing the state-of-the-art in on-device and edge cloud AI by designing efficient hardware solutions for both inference and training systems. Your role involves understanding trends in ML network design through customer engagements and academic research, determining hardware requirements for AI training systems, and analyzing current accelerator architectures. You will architect enhancements for flexible computational blocks capable of handling various data types and precisions, optimize memory technology subsystems, and develop scale-out and scale-up architectures to ensure power efficiency. The ideal candidate possesses a Master's degree in Computer Science or related field with 3+ years of experience in hardware engineering, particularly in defining GPU or accelerator architecture for AI training systems. Proficiency in C++ and Python is essential, along with knowledge of NVIDIA/AMD GPUs, LLM architectures, and front-end ML frameworks like TensorFlow and PyTorch.

Skills

Python C++ TensorFlow PyTorch DeepSpeed FSDP NVIDIA DGX Network-on-Chip System-on-Chip Memory Technologies Communication Protocols Hardware Modeling Performance Estimation Power Estimation GPU Architectures LLM Architectures

What you'll do

Analyze trends in ML network design to influence SW and HW development.
Determine hardware requirements for AI training systems through customer interactions.
Design flexible computational blocks supporting various data types and precisions.
Create memory subsystems optimized for capacity, bandwidth, and compute proximity.
Develop scale-out and scale-up architectures with integrated communication solutions.
Perform competitive analysis and pre-silicon performance predictions for ML workloads.

What we're looking for

3+ years of hardware engineering experience in designing GPU or accelerator architectures for AI model training.
In-depth knowledge of NVIDIA and AMD GPU capabilities and architectures.
Understanding of large language model (LLM) architecture and hardware requirements.
Experience with modeling hardware and workloads to extract performance and power estimates.
Knowledge of communication protocols, Network-on-Chip (NoC) designs, and memory technologies in AI systems.
Proficiency in C++ and Python programming languages.
Strong analytical skills for problem-solving and debugging.

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