RFIC Layout Engineer

As an RFIC Layout Engineer, you will join the Wireless SoC Radio Team to design and bring next-generation wireless technologies into high-volume production using advanced CMOS technology nodes. You will work closely with the RFIC design team to perform detailed transistor-level layout and verification for custom RF and analog IP, including LNAs, mixers, PLLs, modulators, power amplifiers, and data converters. Your daily responsibilities include block level floorplanning, performing extraction, DRC, LVS, and DFM checks, and conducting reviews for electromigration, signal path integrity, and matching. You will utilize Cadence layout tools and possess expertise in FinFET technology while applying techniques for RF shielding and high-frequency routing. Preferred skills include proficiency in PERL or SKILL scripting to support the development of complex SoC products within the radio transceiver domain.