Hardware Engineer (hybrid) - 2010267

Cisco

Remote Hybrid

Quick summary

Work type: Remote
Location: San Jose, CA
Salary: $135,800–$193,400 / yr
Posted: 1 day ago
Closes: Jul 10, 2026
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $179k

This role $165k

$126k most similar roles pay here $228k

This role pays less than 68% of similar roles. Most pay $152,875–$205,750 — the shaded band above. At the midpoint, this role pays about $165k versus about $179k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 179 open roles on FindRole.

Listed pay typically runs $165,000–$241,400 across 179 roles with salary data.

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At a glance

TL;DR · Hardware Engineer (hybrid) - 2010267

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Join our dynamic team as a System Level Test (SLT) Engineer and lead the design, automation, and validation of robust SLT solutions for High Volume Manufacturing (HVM) of cutting-edge, high-power, high-speed SOCs. You will develop comprehensive test flows and scripts to maximize coverage while collaborating with system architecture, chip design, and validation teams to ensure seamless production test enablement. Key responsibilities include custom SLT development, handler selection, PCB design, and temperature control systems integration, as well as yield analysis and reliability testing. Ideal candidates have a background in scripting (Python, Perl), automated test frameworks, and hands-on experience with test hardware integration. Familiarity with OSATs, silicon qualification methodologies, and DPPM reduction is preferred for this fast-paced, collaborative environment focused on high-volume SOC manufacturing.

Skills

Python Perl PCB design Test hardware integration Temperature control systems OSATs HTOL Burn-in NPI HVM RMA processes Yield analysis DPPM reduction High-power environments Complex SOC architectures

What you'll do

Lead the design and validation of System Level Tests for high-volume manufacturing.
Develop comprehensive test flows and scripts to maximize SLT coverage.
Partner with cross-functional teams to define production-ready SLT solutions.
Oversee handler selection, enablement, and hardware integration for efficient testing.
Enhance manufacturing test quality by improving yield and reliability across processes.
Collaborate with OSATs on production enablement and DPPM reduction initiatives.
Support silicon qualification and reliability testing at the system level.

What we're looking for

Proven experience in system-level test development for high-volume SOC manufacturing.
Strong background in scripting and developing automated test frameworks.
Hands-on experience with test hardware integration including PCB design and temperature control.
Familiarity with production test flows, NPI, HVM, RMA processes, and yield analysis.
Experience working with OSATs on handler enablement and hardware bring-up.
Knowledge of silicon qualification and reliability methodologies (HTOL, Burn-in).
Expertise in power/performance optimization and DPPM reduction in production environments.

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