Hardware Debug Senior Engineer

Qualcomm

Quick summary

Work type: On-site
Location: Austin, TX
Salary: $111,300–$166,900 / yr
Posted: 157 days ago
Closes: Jul 21, 2026
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $187k

This role $139k

$98k most similar roles pay here $233k

This role pays less than 92% of similar roles. Most pay $165,200–$208,000 — the shaded band above. At the midpoint, this role pays about $139k versus about $187k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 828 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 508 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · Hardware Debug Senior Engineer

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Join the Qualcomm Cloud System Validation team as a PCIe Gen5/6 and 400/800 GB/s Ethernet Debug and Validation Engineer, contributing to cutting-edge rack-level AI inference solutions for liquid-cooled data centers. Your daily tasks will involve executing post-silicon validation for SOC interfaces like Ethernet, PCIe, and USB, collaborating with global teams to resolve customer issues, and providing design recommendations. You’ll use tools such as protocol analyzers, SCAN, and JTAG to debug complex hardware problems and ensure reliable system integration. Required skills include coding in Unix, Linux, Python, Perl, and C/C++, experience with high-speed IO interfaces, and proficiency in lab equipment like BERT, VNA, scopes, and signal generators. Ideal candidates have 5+ years of relevant experience in PCIe and Ethernet validation, as well as a Master’s degree in computer or electrical engineering.

Skills

Python Linux Unix C C++ PCIe Ethernet MCA RAS BERT VNA scopes protocol_analyzer signal_generator JTAG post-silicon_validation hight_speed_IO_interfaces debug_tools scripting_languages

What you'll do

Execute post-silicon validation for SOC interfaces including Ethernet and PCIe.
Coordinate with global teams to debug chip issues and provide design recommendations.
Document validation results and track chip issues across various stages of development.
Investigate and resolve customer-related failures involving PCIe, Memory, MCA, and RAS.
Utilize debug tools to narrow down and root cause complex customer issues.

What we're looking for

Experience in post-silicon validation and high-speed IO interfaces.
Proficiency in scripting languages (Unix, Linux, Python, Perl).
Strong hardware debug and analytical skills using lab equipment.
Ability to read and understand schematics for hardware debugging.
Collaborative communication skills across multiple functional teams.
Expertise in PCIe protocol (Gen1~Gen5) debug and validation.
Knowledge of Ethernet functional and protocol validation techniques.

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