ESD Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Beaverton, OR
Posted: 1 day ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Similar $185k

$133k $228k

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This listing doesn't post a salary. Most similar roles pay $154,069–$215,312.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3564 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2760 roles with salary data.

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At a glance

TL;DR · ESD Engineer

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The ESD Engineer will join a cross-functional team to take ownership of the ESD and Latch-Up requirements for all integrated circuits developed by and for Apple. The primary responsibility involves ensuring silicon is designed to meet specific ESD specifications and manufacturing requirements while delivering high-quality on-chip IPs immune to ESD, EOS, and latchup events. Day-to-day tasks include defining ESD methodologies, designing protection devices and circuits, and developing test structures to characterize silicon properties. The role requires deep knowledge of transistor device characteristics and models such as HBM, CDM, MM, and IEC-61000-4-2. Candidates must possess hands-on experience with design and layout EDA tools like Virtuoso, Calibre, and Allegro, alongside proficiency with ESD and LUP test and characterization equipment to solve complex hardware reliability problems.

Skills

ESD Latch-Up Transistor Device Characteristics HBM CDM MM IEC-61000-4-2 Virtuoso Calibre Allegro EDA Tools Circuit Design Test Structures Characterization

What you'll do

Define the ESD methodology for all silicon developed by Apple.
Specify chip and IP level ESD requirements for all integrated circuits.
Design ESD protection devices and circuits to meet specific design requirements.
Develop test structures to characterize silicon for ESD and LUP properties.
Drive ESD and LUP related debug activities.
Ensure on-chip IPs are immune to ESD, EOS, and latchup events.
Design robust ESD protections with minimum cost to mission-mode functions.

What we're looking for

BS degree in a technical discipline.
MS degree (preferred).
Deep understanding of transistor device characteristics (preferred).
Solid understanding of models used for testing ESD, including HBM, CDM, MM and IEC-61000-4-2 (preferred).
Knowledge of state-of-the-art ESD circuit design techniques and topologies (preferred).
Hands-on experience with design/layout EDA tools, including Virtuoso, Calibre, Allegro, etc. (preferred).
Experience with ESD/LUP test and characterization equipment (preferred).
Excellent written and verbal communication skills (preferred).

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