below marketmost similar roles pay hereabove market
This role pays less than
86%
of similar roles. Most pay
$155,000–$218,100
— the blue band above.
At the midpoint, this role pays about
$138k
versus about
$187k
for comparable roles.
Based on 240 similar postings.
Employer
About SpaceX
SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.
SpaceX currently has
851 open roles
on FindRole.
Listed pay typically runs
$130,000–$165,000
across 590 roles with salary data.
The EDA Engineer (RFIC Engineering) joins the team to support and improve the IC design environment for silicon design, layout, verification, physical design, and methodology teams. This role focuses on maintaining reliable EDA tools, reproducible PDK and flow usage, and designer productivity across analog, RF, mixed-signal, and digital silicon workflows. Key responsibilities include triaging production issues, building lightweight automation, maintaining documentation, and supporting PDK installation and qualification. The engineer will utilize technologies including Cadence Virtuoso, Spectre, Siemens Calibre, and Synopsys tools, while leveraging Linux and scripting languages such as Python, Tcl, SKILL, Perl, and Makefile. The position addresses the technical challenge of optimizing complex design flows, managing HPC environments, and converting recurring support issues into durable, automated methodology for satellite hardware development.
Support day-to-day EDA/CAD workflows for RFIC and silicon engineering teams including tool launch and environment setup.
Manage analog/RF/mixed-signal specific flows using tools like Virtuoso and Spectre.
Handle PDK installation, qualification, version tracking, and deployment support for foundry processes.
Triage DRC, LVS, PEX, and simulation issues using reproducible debug practices.
Build lightweight automation scripts in Python, Tcl, or SKILL for log collection and regression reporting.
Create and run QA tests for PDK updates, tool upgrades, and flow changes before deployment.
Maintain clear runbooks and documentation for common EDA flows and user errors.
Convert recurring support issues into durable flow changes, automation, or vendor escalations.
What we're looking for
Bachelor's degree in electrical engineering, computer engineering, or computer science.
2+ years of experience in EDA/CAD support, IC design flow development, silicon design, physical verification, verification infrastructure, and/or CAD automation.
Must be a U.S. citizen, national, lawful permanent resident, refugee, asylee, or eligible for required Department of State authorizations.
Master’s degree in electrical engineering, computer engineering, computer science, or a related technical field (preferred).
Hands-on experience using or supporting at least one major EDA flow such as Cadence Virtuoso/Spectre, Siemens Calibre, or Synopsys/Cadence digital tools (preferred).
Practical Linux and scripting experience with Python, shell, Tcl, Perl, Makefile, SKILL, or similar languages (preferred).
Experience with Cadence Virtuoso, ADE Explorer/Assembler, Spectre, SKILL, design libraries, CDF, techfiles, or analog/RF/mixed-signal design flows (preferred).
Experience with Siemens Calibre DRC/LVS/PEX/xRC, Synopsys ICV/StarRC, Cadence Pegasus/Quantus, or related physical verification/extraction tools (preferred).