This role pays less than
85%
of similar roles. Most pay
$150,000–$216,250
— the shaded band above.
At the midpoint, this role pays about
$138k
versus about
$183k
for comparable roles.
Based on 240 similar postings.
Employer
About SpaceX
SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.
SpaceX currently has
680 open roles
on FindRole.
Listed pay typically runs
$130,000–$165,000
across 442 roles with salary data.
The EDA Engineer (RFIC Engineering) joins the team to support and improve the IC design environment used by silicon design, layout, verification, physical design, and methodology teams. This role focuses on maintaining reliable tools, reproducible PDK and flow usage, and ensuring designer productivity across analog, RF, mixed-signal, and digital silicon workflows. The engineer will triage production issues, build lightweight automation, maintain documentation, and convert recurring support problems into reusable methodologies. Key technical requirements include proficiency in Linux and scripting languages such as Python, Tcl, SKILL, Perl, Shell, and Makefiles. Candidates should have experience with tools like Cadence Virtuoso, Spectre, Siemens Calibre, or Synopsys ICV. The role addresses the complex challenge of managing high-performance computing environments, foundry process integration, and automated preflight checks to ensure robust silicon design flows for advanced satellite communications hardware.
Support day-to-day EDA and CAD workflows for RFIC and silicon engineering teams including tool launch and environment setup.
Manage analog, RF, and mixed-signal specific flows using tools like Virtuoso and Spectre.
Oversee PDK installation, qualification, version tracking, and deployment support for supported foundry processes.
Triage technical issues involving DRC, LVS, PEX, simulation, and license management using reproducible debug practices.
Develop lightweight automation scripts in Python, Tcl, SKILL, or Shell to reduce recurring issues and automate log collection.
Maintain and update runbooks and documentation for common EDA flows and tool configurations.
Conduct QA testing for PDK updates, tool upgrades, and flow changes before broad deployment.
Convert repetitive support issues into durable flow improvements, automated checks, or updated technical documentation.
What we're looking for
Bachelor's degree in electrical engineering, computer engineering, or computer science.
2+ years of experience in EDA/CAD support, IC design flow development, silicon design, physical verification, verification infrastructure, and/or CAD automation.
Experience with major EDA tools such as Cadence Virtuoso/Spectre, Siemens Calibre, Synopsys/Cadence digital tools, or Keysight ADS.
Proficiency in Linux and scripting languages including Python, Tcl, SKILL, shell, Perl, and Makefile.
Experience with physical verification and extraction tools like Siemens Calibre, Synopsys ICV/StarRC, or Cadence Pegasus/Quantus.
Knowledge of PDK installation, QA, foundry design-rule manuals, and release management.
Familiarity with HPC environments, job schedulers (Slurm/LSF), license servers, and Linux modules.
Must be a U.S. citizen, national, lawful permanent resident, or eligible for required export control authorizations.
RFIC Layout
Analog Layout
mixed signal design
Python
Perl
Shell Scripting
Linux
Revision Control Systems
Circuit Design
Advanced Node IC Layout
tape out
Density Fill