Digital Layout Design Engineer

What you'll do

• Design complex custom layouts for digital circuits using deep SubMicron CMOS technologies.
• Review and analyze floorplans and complex circuits in coordination with circuit designers.
• Run a complete set of layout design verification tools on completed megacells.
• Plan, schedule, and negotiate layout tradeoffs with the circuit design team.
• Interpret LVS, DRC, and ERC reports to identify the fastest paths for layout completion.
• Use advanced CAD tools and mask design knowledge to perform layout corrections.
• Create robust physical design representations of circuits to meet engineering specifications.

What we're looking for

• A minimum of a bachelor's degree in a related field.
• Experience in custom layout design of deep SubMicron CMOS circuits (preferred).
• High level proficiency in layout floorplanning, standard cell planning, and hierarchical layout assembly (preferred).
• Good understanding of issues with RC delay, electromigration, self heating, and cross capacitance (preferred).
• Excellent communication skills and ability to work with multi-functional teams (preferred).
• Great skills on interpretation of CALIBRE DRC, ERC, LVS, etc. reports (preferred).
• Knowledge of MENTOR GRAPHICS or CADENCE layout tools (preferred).
• Scripting skills in CSH, PERL or SKILL, layout automation, or memory compiler development (preferred).