Deep Learning Compiler Engineer

Nvidia

Confirmed live yesterday Trusted

Remote

Quick summary

Work type: Remote
Location: Santa Clara, CAAustin, TX
Salary: $152,000–$241,500 / yr
Posted: 19 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Competitive pay

How this pay compares to similar roles

Similar $208k

This role $197k

$139k most similar roles pay here $271k

This role pays less than 57% of similar roles. Most pay $175,000–$241,687 — the shaded band above. At the midpoint, this role pays about $197k versus about $208k for comparable roles.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · Deep Learning Compiler Engineer

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As a Deep Learning Compiler Engineer on the CUDA Tile team, you will contribute to a new tile-based programming model for GPUs. Your daily responsibilities involve designing and implementing compiler transformations, developing MLIR-based dialects and lowering passes, and optimizing the performance of tile-based kernels across multiple generations of NVIDIA GPU architectures. You will also define public APIs, craft optimization techniques, and perform general software engineering tasks including debugging and test design. The role requires proficiency in C/C++, as well as experience with IR design and performance analysis. Preferred technical skills include knowledge of CPU and GPU architecture, CUDA or OpenCL programming, and familiarity with MLIR, LLVM, XLA, and TVM. This position focuses on the core infrastructure supporting deep learning models and algorithms to ensure efficient execution in high-performance computing environments.

Skills

CUDA C++ C MLIR LLVM XLA TVM Compiler Optimization GPU Architecture Performance Analysis Deep Learning IR Design OpenCL

What you'll do

Design and implement compiler transformations for the CUDA Tile programming model.
Develop MLIR-based dialects and lowering passes for GPU kernels.
Optimize the performance of tile-based kernels across multiple NVIDIA GPU architectures.
Define public APIs for the CUDA Tile software components.
Craft and implement advanced compiler and optimization techniques.
Perform performance analysis and debugging to ensure efficient execution on hardware.
Lead independent development efforts by defining project goals and scope.

What we're looking for

Bachelor's, Master's, or Ph.D. in Computer Science, Computer Engineering, or a related field (or equivalent experience).
3+ years of relevant work or research experience in compiler optimization, performance analysis, and IR design.
Excellent C/C++ programming and software design skills, including debugging, performance analysis, and test design.
Ability to work independently, define project goals and scope, and lead your own development effort.
Strong interpersonal skills and the ability to work in a dynamic product-oriented team.
Knowledge of CPU and/or GPU architecture (preferred).
CUDA or OpenCL programming experience (preferred).
Experience with MLIR, LLVM, XLA, TVM, and deep learning models and algorithms (preferred).

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