Deep Learning Compiler Engineer

Nvidia

Confirmed live today Low trust

Remote

Quick summary

Work type: Remote
Location: Santa Clara, CAAustin, TXORWACARedmond, WA
Salary: $152,000–$241,500 / yr
Employment: Full-time
Posted: 65 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $215k

This role $197k

$139k $277k

below market most similar roles pay here above market

This role pays less than 63% of similar roles. Most pay $188,675–$241,750 — the blue band above. At the midpoint, this role pays about $197k versus about $215k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Deep Learning Compiler Engineer

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As a Deep Learning Compiler Engineer, you will join the Tensor IR & CUDA Tile team to develop compiler technologies for NVIDIA GPUs. You will design and implement compiler transformations, develop MLIR-based dialects and lowering passes, and optimize the performance of tile-based kernels to ensure efficient execution across multiple GPU architectures. Your daily work involves defining public APIs, crafting optimization techniques, and performing general software engineering tasks. You will utilize C/C++ for programming, debugging, and performance analysis. The role requires expertise in compiler optimization, IR design, and performance analysis. You may also leverage knowledge of LLVM, XLA, TVM, CUDA, or OpenCL. This position addresses the technical challenge of generating high-performance GPU kernels for deep learning models and generative AI applications.

Skills

CUDA C++ MLIR LLVM TensorIR XLA TVM OpenCL GPU Architecture Compiler Optimization Deep Learning Performance Analysis IR Design C Software Design

What you'll do

Design and implement compiler transformations for CUDA Tile and TensorIR technologies.
Develop MLIR-based dialects and lowering passes for NVIDIA GPUs.
Optimize the performance of tile-based kernels across multiple GPU architectures.
Define public APIs for compiler and optimization techniques.
Perform performance analysis and debugging for high-performance GPU kernels.
Execute general software engineering tasks to support deep learning infrastructure.

What we're looking for

Bachelor's, Master's, or Ph.D. in Computer Science, Computer Engineering, or a related field (or equivalent experience).
3+ years of relevant work or research experience in compiler optimization, performance analysis, and IR design.
Excellent C/C++ programming and software design skills, including debugging, performance analysis, and test design.
Ability to work independently, define project goals and scope, and lead your own development effort.
Strong interpersonal skills and the ability to work in a dynamic product-oriented team.
Knowledge of CPU and/or GPU architecture (preferred).
CUDA or OpenCL programming experience (preferred).
Experience with MLIR, LLVM, XLA, TVM, and deep learning models and algorithms (preferred).

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