Data Center Test Solutions Architect

Amd

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$130,400–$195,600 / yr
Posted
23 days ago
Freshness
Confirmed live yesterday
Closes
Sep 11, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $187k
This role $163k
$119k most similar roles pay here $239k

This role pays less than 57% of similar roles. Most pay $147,743–$227,175 — the shaded band above. At the midpoint, this role pays about $163k versus about $187k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 512 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 512 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Data Center Test Solutions Architect

The Data Center Test Solutions Architect joins the engineering team to ensure products meet high standards of quality and reliability through collaboration with design, manufacturing, and quality teams. This role involves integrating DFT features early, analyzing test coverage metrics, and resolving board-level testability issues to improve product robustness. The architect will lead architecture reviews for diagnostic coverage, manage new product introductions for global data center platforms, and develop readiness tooling validation testing. Key responsibilities include creating test documentation, tracking yield and failure rates, and coordinating with ODM/OEM vendors on specifications. Required skills include proficiency in Python and Perl scripting, knowledge of IPC standards, PCB manufacturing, and failure analysis techniques. The role requires a deep understanding of low-level system architecture, digital circuit design, and high-speed bus protocols like PCIe, USB, and NVMe.

What you'll do

  • Integrate DFT features with hardware design teams to ensure board-level testability.
  • Analyze test coverage metrics and implement strategies to increase coverage while reducing escapes.
  • Create and maintain comprehensive test documentation, including plans, procedures, and performance reports.
  • Lead architecture reviews to develop diagnostic coverage plans for both hardware and software.
  • Drive system design for serviceability requirements to ensure form, fit, and function in data center environments.
  • Execute Data Center readiness tooling validation testing based on established development plans.
  • Manage product specifications and test plans in collaboration with ODM/OEM vendors.
  • Automate test flows and improve efficiency using scripting languages like Python or Perl.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
  • Ability to analyze and improve test coverage and troubleshoot complex board-level failures (preferred).
  • Proficiency in scripting with Python or Perl to automate test flows (preferred).
  • Familiarity with IPC standards, PCB manufacturing practices, and failure-analysis techniques (preferred).
  • Experience working cross-functionally in fast-paced engineering environments (preferred).
  • Solid grasp of low-level system architecture, digital circuit design, and high-speed bus protocols like PCIe, USB, and NVMe (preferred).

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