CPU Verification Engineer (RISC-V)

Qualcomm

Confirmed live yesterday High trust
Remote

Quick summary

Work type
Remote
Location
Santa Clara, CAAustin, TXNCORWA
Salary
$167,100–$250,700 / yr
Posted
43 days ago
Freshness
Confirmed live yesterday
Closes
Jan 26, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $189k
This role $209k
$129k most similar roles pay here $264k

This role pays more than 75% of similar roles. Most pay $168,500–$210,475 — the shaded band above. At the midpoint, this role pays about $209k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · CPU Verification Engineer (RISC-V)

The CPU Verification Engineer (RISC-V) joins the CPU Engineering team to validate CPU and SOC level micro-architectures in collaboration with Chip Architects. The role involves developing detailed test and coverage plans, creating scalable verification methodologies, and building comprehensive environments including stimulus, checkers, assertions, trackers, and coverage components. Responsibilities include executing verification plans for design bring-up, running regressions, and debugging test failures while tracking progress through specific metrics. Candidates must possess extensive knowledge of RISC-V instruction set architectures and micro-processor functions like cache coherence, memory ordering, branch prediction, and address translation. Required skills include experience with assembly code, transactors, simulators, gate-level simulation, and waveform viewers. The role focuses on ensuring that specific portions of the CPU design are launch-ready by proving correctness at both the block level and subsystem levels.

What you'll do

  • Develop detailed test and coverage plans based on CPU and SoC micro-architectures.
  • Create scalable and portable verification methodologies across different environments.
  • Build verification environments including stimulus, checkers, assertions, trackers, and coverage components.
  • Develop specific testbenches for assigned functional domains.
  • Execute design bring-up, environment bring-up, and regressions to enable all features.
  • Debug test failures and track progress using bug reports and coverage metrics.
  • Validate CPU and SoC micro-architectures to ensure they are launch-ready for end products.

What we're looking for

  • A Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 4+ years of relevant experience.
  • A Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 3+ years of relevant experience.
  • A PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 2+ years of relevant experience.
  • Extensive knowledge of industry Instruction Set Architectures, particularly RISC-V.
  • Deep knowledge of Micro-Processor Verification functions and architectures including Cache Coherence, Memory ordering, and Branch Prediction.
  • Experience in writing test plans, portable testbenches, transactors, and assembly code.
  • Proficiency with verification methodologies and tools such as simulators, coverage collection, gate-level simulation, and waveform viewers.
  • Experience with advanced techniques such as Formal, Assertions, and Silicon bring-up.

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