CPU Verification Engineer (RISC-V)

Qualcomm

Confirmed live today High trust
Remote

Quick summary

Work type
Remote
Location
Santa Clara, CAAustin, TXNCORWA
Salary
$175,600–$263,400 / yr
Posted
25 days ago
Freshness
Confirmed live today
Closes
Mar 31, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k
This role $220k
$131k $278k
below market most similar roles pay here above market

This role pays more than 76% of similar roles. Most pay $162,000–$219,500 — the blue band above. At the midpoint, this role pays about $220k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · CPU Verification Engineer (RISC-V)

JOB TITLE: CPU Verification Engineer (RISC-V) As a CPU Verification Engineer within the CPU Engineering group, you will collaborate with Chip Architects to validate CPU and SOC level micro-architectures. Your primary responsibility involves ensuring specific parts of the CPU design are launch ready for the end product. You will develop detailed test and coverage plans, create scalable verification methodologies, and build verification environments including stimulus, checkers, assertions, trackers, and coverage. Day-to-day tasks include executing verification plans, performing design bring-up, running regressions, and debugging test failures. You must utilize skills in RISC-V, Random Instruction Sequencing, and formal assertions. Technical requirements include experience with simulators, coverage collection, gate-level simulation, and waveform viewers. You will solve complex problems regarding cache coherence, memory ordering, branch prediction, and speculative execution.

What you'll do

  • Develop detailed test and coverage plans based on CPU and SOC micro-architectures.
  • Create a scalable and portable verification methodology for various environments.
  • Build verification environments including stimulus, checkers, assertions, trackers, and coverage components.
  • Develop functional testbenches and verification plans for specific design domains.
  • Execute design bring-up, regression testing, and debug test failures.
  • Track and report verification progress using bug counts and coverage metrics.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of relevant engineering experience.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of relevant engineering experience.
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of relevant engineering experience.
  • Develop detailed Test and Coverage plans based on Architecture and Micro-architecture.
  • Develop Verification Methodology, including Stimulus, Checkers, Assertions, Trackers, and Coverage.
  • Execute Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions, and Debug.
  • Extensive knowledge of industry Instruction Set Architectures, particularly RISC-V (preferred).
  • Deep knowledge of Micro-Processor Verification functions and Architectures, such as Cache Coherence and Branch Prediction (preferred).

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