CPU Top-Level Design Verification Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: —
Salary: $150,400–$277,600 / yr
Posted: 15 days ago
Freshness: Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $197k

This role $214k

$135k most similar roles pay here $293k

This role pays more than 68% of similar roles. Most pay $171,757–$223,000 — the shaded band above. At the midpoint, this role pays about $214k versus about $197k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2925 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · CPU Top-Level Design Verification Engineer

Role Posting Log in to save

As a CPU Top-Level Design Verification Engineer, you will own the verification methodology, tools, and flow for a high-performance, low-power processor design. Working closely with RTL designers and verification engineers, you will define effective methodologies for complex designs while developing test plans, test benches, and environments. Your daily responsibilities include creating tests in assembly and C/C++, building coverage monitors to ensure plan completion, and managing automated testing flows within regression frameworks. You will utilize SystemVerilog, including advanced features like assertions and interfaces, alongside Python for scripting and EDA tool integration. The role requires deep expertise in computer architecture, including instruction set architectures, pipeline design, and cache hierarchies. You will solve complex hardware challenges by performing failure analysis on large-scale random regressions to identify root causes and ensure verification closure for the processor's core functionality.