CPU Hardware Verification Software Engineer

Arm Holdings

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$130,100–$176,000 / yr
Posted
16 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $193k
This role $153k
$118k most similar roles pay here $244k

This role pays less than 85% of similar roles. Most pay $167,191–$219,500 — the shaded band above. At the midpoint, this role pays about $153k versus about $193k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 105 open roles on FindRole.

Listed pay typically runs $209,100–$282,900 across 105 roles with salary data.

Most-posted roles

View all roles at Arm Holdings

At a glance

TL;DR · CPU Hardware Verification Software Engineer

As a CPU Hardware Verification Software Engineer on the Raven Random Test Generator team, you will develop and deploy Raven, a dynamic random test generator used by CPU design teams to verify architectural features. You will collaborate with senior engineers and architects to solve complex verification problems by designing and implementing innovative functionality, creating test templates that stress microarchitectural features, and resolving issues reported by users. This role requires professional software development experience in C++, along with proficiency in Python or other scripting languages. Key technical requirements include a deep understanding of computer architecture—including caches, TLBs, and processor pipelines—as well as assembly-language programming. You will work within the Architecture & Technology Group to ensure new architectural features are verifiable, utilizing your knowledge of object-oriented programming, data structures, algorithms, and potentially Verilog HDL in hardware simulation environments.

What you'll do

  • Develop, document, test, and deploy the Raven dynamic random test generator in C++.
  • Design and implement new functionality to verify architectural and microarchitectural features.
  • Create test templates that stress and exercise Arm CPU design components.
  • Investigate, debug, and resolve issues reported by internal QA and external users.
  • Work with verification engineers to identify challenges and develop technical solutions.
  • Apply architectural specifications to ensure new features can be verified effectively.
  • Use AI tools responsibly to accelerate engineering tasks while ensuring code quality.

What we're looking for

  • Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field.
  • Professional software development experience in C++ and Python or other scripting languages.
  • Strong software engineering skills including modern object-oriented programming, data structures, and algorithms.
  • Experience with assembly-language programming and strong understanding of computer architecture fundamentals like caches, TLBs, and pipelines.
  • Strong written and verbal communication skills.
  • Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field (preferred).
  • Professional experience with microprocessor architecture, CPU verification, random test generation, or complex software systems (preferred).
  • Advanced CPU microarchitecture knowledge, familiarity with Arm architectures, Verilog HDL, and hardware simulation environments (preferred).

More like this

Similar roles

CPU Verification Engineer

Amd

Fort Collins, CO 31 days ago $144,800–$217,200
C++ Computer Architecture RTL Python Perl Assembly SoC ASIC Verification Test Automation Scoreboards Reference Models Coverage Closure

CPU Verification Engineer (RISC-V)

Qualcomm

Remote (Santa Clara, CA) +4 15 days ago $175,600–$263,400
RISC-V Micro-architecture Assertion Gate-level Simulation Assembly Testbench Coverage Collection Silicon bringup Mixed Signal Verification Waveform Viewers Simulators Transactors Memory Management Cache Coherence
4+ yrs exp Remote