Careers

Qualcomm

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$115,600–$173,400 / yr
Posted
56 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $180k
This role $144k
$101k most similar roles pay here $249k

This role pays less than 81% of similar roles. Most pay $152,075–$208,800 — the shaded band above. At the midpoint, this role pays about $144k versus about $180k for comparable roles.

Based on 239 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 660 open roles on FindRole.

Listed pay typically runs $154,000–$231,000 across 429 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · Careers

Join Qualcomm Technologies as an ASIC Design Verification Engineer within their Global SOC organization, where you will contribute to shaping 5G product lines including low-power Snapdragon chips and AI/ML applications. This senior role involves developing comprehensive verification methodologies for System-on-Chip (SoC) designs, creating detailed test plans, and executing verification tests to ensure design quality. You will collaborate with architects, designers, and other teams globally to innovate solutions using advanced tools like SystemVerilog/UVM and formal verification techniques. Ideal candidates possess a strong background in CPU and ASIC verification, experience with assertion-based verification, and knowledge of SOC architecture components such as ARM CPUs, DSPs, and GPUs.

What you'll do

  • Develop detailed verification plans and test strategies for SOC designs.
  • Execute complex verification tests using System Verilog and analyze results.
  • Innovate new verification methodologies to enhance quality and efficiency.
  • Collaborate with design teams to resolve complex verification issues.
  • Maintain adherence to industry standards in verification processes.

What we're looking for

  • Minimum 2+ years of design verification experience.
  • Strong understanding of SystemVerilog/UVM based verification skills.
  • Experience in handling verification from test planning to tapeout for large HW designs.
  • Good knowledge of SOC architecture and CPU architecture (ARM preferred).
  • Ability to develop innovative solutions to verification challenges independently.
  • Familiarity with assertion-based verification methodology and coverage analysis.
  • Strong communication skills for collaboration across global teams.

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