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Next-Gen System Cache ASIC Digital Design Engineer

Qualcomm

San Diego, CA 20 days ago $121,800–$182,600
Actively hiring Confirmed live today High trust Below market
ASIC Design RTL Design SystemVerilog Verilog Computer Architecture Synopsys Synthesis Low Power Design Python C++ C Coverage-based Design Verification SoC Interconnects Memory Controllers micro architecture Debugging
2+ yrs exp
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