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Senior Chip Lead Engineer SoC/ASIC

Amd

San Jose, CA 8 days ago $164,000–$246,000
Actively hiring Confirmed live yesterday High trust Competitive pay
ASIC FPGA RTL Verilog SystemVerilog VHDL EDA Tools Physical Design Timing Closure Power Optimization DFT Silicon Validation Device Drivers Low-level Software AI/ML Accelerators
10+ yrs exp
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