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Senior Chip Lead Engineer, SoC/ASIC

Amd

San Jose, CA 54 days ago $164,000–$246,000
Actively hiring Confirmed live yesterday High trust Competitive pay
ASIC FPGA Verilog SystemVerilog VHDL RTL Design DFT Physical Design Timing Closure Power Optimization EDA Tools Silicon Validation Device Drivers System Software AI/ML Accelerators CPU GPU
10+ yrs exp
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