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ASIC Design Engineer, Networking/ DPU/ AI Systems

Amd

Santa Clara, CA 154 days ago $200,000–$300,000
Actively hiring Confirmed live yesterday High trust Above market
ASIC Design RTL Design Verilog SystemVerilog C/C++ Python Tcl Shell P4 ARM RISC-V AXI AMBA Network-on-Chip SoC Tapeout Silicon Bring-up Packet Processing
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