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Core RTL/Microarchitecture Power Lead

Amd

Santa Clara, CA 6 days ago $232,000–$348,000
Actively hiring Confirmed live today Posted this week High trust Above market
Microprocessor Architecture RTL Verilog System Verilog Low Power Design Logic Design PTPX Python Ruby Perl Shell Synthesis Place and Route Timing Closure Physical Design AI LLMs Performance Simulators
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