Browse tech roles

Python C++ PyTorch AI LLMs DLRMs system-level architectural research event-driven simulation models high-performance interconnects memory hierarchies performance evaluation design-space exploration communication skills collaboration +9 more Show less

Python C++ PyTorch LLMs DLRMs AI system hardware architectures system-level architectural research performance-per-watt metrics architecture requirements and trade-offs high-performance interconnects memory hierarchies cross-functional collaboration quantitative modeling +8 more Show less

Python C++ PyTorch AI system hardware architectures LLMs DLRMs performance-per-watt metrics event-driven simulation models system-level architectural research architecture-level design decisions high-performance interconnects memory hierarchies +7 more Show less

Top Secret security clearance complex technical systems product lifecycle CI/CD AWS Azure GCP Kubernetes Docker Terraform Python Java C++ PostgreSQL MongoDB Git Jenkins Ansible Prometheus Grafana +15 more Show less

Python C++ ROS AWS Kubernetes Docker CI/CD Git Linux PostgreSQL Maven Jenkins Ansible Terraform Prometheus Grafana +11 more Show less

MIL-STD-810 MIL-STD-461 MIL-STD-704 V&V planning Qualification by Similarity (QBS) requirements management tools Microsoft Office Foundry Confluence DO-160 MIL-HDBK-310 AS9100 +7 more Show less

RF PCB HALT/HASS Six Sigma Lean Python Go Docker Git JIRA Confluence AWS Kubernetes +8 more Show less

RF PCB HALT/HASS Six Sigma Lean Python Go Docker Git JIRA Confluence CI/CD AWS Kubernetes +9 more Show less

FPGA Python Docker Git CI/CD PostgreSQL AWS Kubernetes Terraform EMC Signal_Integrity_Analysis Test_Automation_Scripting Schematic_Capture High_Speed_Signal_Routing Electromagnetic_Interference_Mitigation Reliability_Testing-Methods Formal_Design_Reviews Regulatory_Compliance Pre_Compliance_Testing +14 more Show less

SystemVerilog UVM Python Perl C++ VHDL Verilog SystemC AI ML GenAI 4G/5G 3GPP Formal verification Simulation acceleration Unix/Linux Makefiles XML OOP HW/SW co-verification +15 more Show less

Python C C++ Verilog System Verilog Unix/Linux Shell scripting Makefiles XML RTL coding Synthesis Clock domain crossing Low power design Verification +9 more Show less

C C++ Python CUDA HIP Linux DRM/GEM ROCm IREE PyTorch Triton LLVM MLIR GPU HPC AI Compiler Performance Modeling System-Level Programming Kernel-Mode Drivers Memory Management Framework Internals Quantization Techniques Attention Mechanisms Mixture-of-Experts +20 more Show less

RTL SystemVerilog C/C++ SystemC Verilog Synthesis Lint Clock Domain Crossing Low Power Design Verification Wireless Modem ASICs DSP Communication Systems 4G/5G 3GPP Physical Layer Standards Generative AI ML Agentic-AI Automation Unix/Linux Shell Scripting Python Perl Makefiles XML +17 more Show less

Cadence_PSpice Altium_Designer KiCad Python C C++ Matlab Power_Integrity Signal_Integrity SPI UART CAN FMEA Buck_Converter Boost_Converter Flyback_Converter Safety_Critical_Systems Brake_System_Plausibility_Devices Formal_Design_Reviews +14 more Show less

PyTorch JAX vLLM SGLang ROCm Distributed Systems Multi-node/Multi-GPU Performance Profiling TorchProfiler ROCM Profiler Nsight Transformer Models Attention Mechanisms Quantization Speculative Decoding FlashAttention Cross-functional Collaboration Deep Learning Large Language Models Computer Vision +15 more Show less

Python C/C++ Object-Oriented Perl SystemVerilog UVM AWS GCP Azure OCI CI/CD Jenkins GitHub Actions Git Model Context Protocol (MCP) Object-Oriented Programming (OOP) +10 more Show less