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Active Keyword: Memory Subsystem Architect and Design Engineer Remove filter Location: Santa Clara Remove filter Clear all

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Memory Subsystem Architect and Design Engineer

Amd

Santa Clara, CA 99 days ago $232,000–$348,000
Actively hiring Confirmed live 2 days ago High trust Above market
DDR5 DDR4 Memory Subsystems ASIC Altium Cadence SPICE Python Root Cause Analysis Protocol Analyzers Circuit Design System Integration
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