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Active Keyword: Logic Design Engineer Remove filter Location: Santa Clara Remove filter Clear all

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Logic Design Engineer

Amd

Santa Clara, CA 94 days ago $166,400–$249,600
Actively hiring Confirmed live today High trust Competitive pay
Verilog RTL ASIC Design Mixed-Signal Design High-Speed SerDes DDR GDDR HBM STA CDC UPF Power Estimation Silicon Bring-up Synthesis Digital Design Microarchitecture
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