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Active Keyword: Sr. Staff ASIC Design Engineer Remove filter Location: San Jose Remove filter Clear all

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Senior Staff ASIC Design Engineer

Amd

San Jose, CA 7 days ago $200,000–$300,000
Actively hiring Confirmed live yesterday Posted this week High trust Above market
Verilog System Verilog DFT ATPG RTL Design UVM OVM Python Tcl Perl Shell Synopsys DC Compiler PrimeTime Cadence Virtuoso VCS Static Timing Analysis FPGA HBM PCIe SerDes
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