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Active Keyword: Sr. Staff ASIC Design Engineer Remove filter Location: San Jose Remove filter Clear all

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Senior Staff ASIC Design Engineer

Amd

San Jose, CA 53 days ago $200,000–$300,000
Actively hiring Confirmed live today High trust Above market
Verilog System Verilog UVM Python Tcl Perl Shell RTL Design DFT Static Timing Analysis Synthesis place-and-route FPGA PCIe Serdes HBM Synopsys DC Compiler Primetime VCS Cadence Virtuoso
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