Senior Hardware Acceleration Efficiency Architect

Arm Holdings

Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$161,500–$218,500 / yr
Posted
1 day ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $206k
This role $190k
$150k most similar roles pay here $270k

This role pays less than 68% of similar roles. Most pay $177,250–$235,750 — the shaded band above. At the midpoint, this role pays about $190k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 40 open roles on FindRole.

Listed pay typically runs $184,500–$249,600 across 40 roles with salary data.

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View all roles at Arm Holdings

At a glance

TL;DR · Senior Hardware Acceleration Efficiency Architect

The Emulation and FPGA Efficiency Architect role within Arm’s Productivity Engineering Group involves enhancing the global hardware acceleration infrastructure by benchmarking workloads, optimizing scheduling mechanisms, integrating EDA vendor APIs, and developing data pipelines for performance visualization. This position requires a minimum of five years’ experience in hardware emulation and FPGA environments, with expertise in profiling workloads, understanding workflows, and automating resource management. Candidates should be proficient in Linux-based systems, scripting languages like Python and Bash, and familiar with tools such as Prometheus and Grafana. The role also entails collaborating closely with Arm’s scheduler team and EDA tool vendors to drive continuous improvement and optimize performance for thousands of engineers globally.

What you'll do

  • Benchmark emulation and FPGA workloads to quantify performance baselines.
  • Optimize scheduling mechanisms for system availability and job throughput.
  • Integrate EDA vendor APIs to automate resource management and streamline jobs.
  • Develop data pipelines and dashboards to visualize trends and inefficiencies.
  • Enhance scheduler intelligence for better resource allocation in production workloads.

What we're looking for

  • Minimum 5 years of experience in hardware emulation and FPGA environments.
  • Expertise in benchmarking and profiling emulation workloads with data-driven improvements.
  • Experience integrating EDA vendor APIs for automation and resource management.
  • Familiarity with scheduler design and integration for optimizing workload throughput.
  • Proficiency in Linux-based scripting (Python, Bash) for automation and analysis.
  • Strong analytical skills with a focus on performance validation and continuous improvement.

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