Senior Hardware Acceleration Efficiency Architect

Arm Holdings

Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$161,500–$218,500 / yr
Posted
24 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $206k
This role $190k
$151k most similar roles pay here $264k

This role pays less than 68% of similar roles. Most pay $177,250–$235,750 — the shaded band above. At the midpoint, this role pays about $190k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 40 open roles on FindRole.

Listed pay typically runs $184,500–$249,600 across 40 roles with salary data.

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View all roles at Arm Holdings

At a glance

TL;DR · Senior Hardware Acceleration Efficiency Architect

Join Arm’s Productivity Engineering Group as an Emulation and FPGA Efficiency Architect, where you will enhance the performance and utilization of global hardware acceleration infrastructure. Your daily tasks include benchmarking workloads, optimizing scheduling mechanisms, integrating EDA vendor APIs for automation, collaborating with in-house scheduler teams to improve resource allocation, and developing data pipelines and dashboards for performance visualization. You should have expertise in hardware emulation and FPGA environments, experience with Linux-based scripting (Python, Bash), familiarity with Prometheus and Grafana, and a strong analytical approach to performance validation. This role involves working on large-scale verification environments and collaborating closely with EDA tool vendors like Cadence and Synopsys to drive continuous improvement and efficiency gains at scale.

What you'll do

  • Benchmark emulation and FPGA workloads to quantify performance baselines.
  • Optimize scheduling mechanisms to enhance system availability and job throughput.
  • Integrate EDA vendor APIs for automated resource management and job orchestration.
  • Develop data pipelines and dashboards to visualize trends and inefficiencies.
  • Collaborate with scheduler team to improve resource allocation for workloads.
  • Drive continuous improvement through automation and workflow optimization efforts.
  • Partner with EDA vendors to validate and deploy performance enhancements.

What we're looking for

  • Strong experience in hardware emulation and FPGA environments.
  • Proven ability to benchmark and profile workloads, interpret performance data, and drive improvements.
  • Experience integrating EDA vendor APIs or SDKs into custom automation solutions.
  • Familiarity with scheduler design and integration for resource allocation optimization.
  • Proficiency in Linux-based environments and scripting (Python, Bash) for automation.
  • Strong analytical skills with a data-driven approach to performance validation.
  • Knowledge of cloud-hosted emulation and elastic compute models.

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