Senior Engineer, AI Systems

Samsung Semiconductor

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$138,000–$206,000 / yr
Posted
today

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $209k
This role $172k
$123k most similar roles pay here $275k

This role pays less than 75% of similar roles. Most pay $172,500–$246,150 — the shaded band above. At the midpoint, this role pays about $172k versus about $209k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 54 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 54 roles with salary data.

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View all roles at Samsung Semiconductor

At a glance

TL;DR · Senior Engineer, AI Systems

The Senior AI Systems Engineer role at AGICL lab within DSRA involves designing and optimizing high-performance Triton kernels for large language model (LLM) workloads on modern accelerators. This hands-on position requires daily analysis of kernel performance using profiling tools to identify bottlenecks and propose optimizations, working closely with hardware architects and compiler engineers to ensure end-to-end efficiency. Candidates should have extensive experience in writing high-performance Triton kernels, a deep understanding of LLM fundamentals, and proficiency in Python and low-level programming paradigms. Familiarity with FlashAttention, fused kernels, MoE kernels, and emerging domain-specific languages (DSLs) is essential. The role offers the opportunity to work on cutting-edge accelerator hardware and experimental software stacks, contributing to the design and optimization of next-generation AI systems.

What you'll do

  • Design, implement, and optimize high-performance Triton kernels for LLM workloads on accelerators.
  • Analyze kernel performance using profiling tools to identify memory access patterns and synchronization issues.
  • Propose concrete optimizations to address performance bottlenecks in kernel design.
  • Work with hardware architects and compiler engineers to co-design solutions spanning software and hardware boundaries.
  • Prototype and evaluate kernel optimizations using experimental domain-specific languages (DSLs) and compiler flows.

What we're looking for

  • Strong experience writing high-performance Triton kernels for GPUs or other accelerators.
  • Solid understanding of large language model fundamentals and transformer architectures.
  • Deep knowledge of accelerator hardware architecture, including memory hierarchies.
  • Proven ability to read and interpret profiling data and performance counters.
  • Experience diagnosing and resolving performance bottlenecks in kernel-level code.
  • Strong systems programming skills in Python and low-level performance-oriented paradigms.
  • Familiarity with emerging domain-specific languages (DSLs) for accelerator programming.

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