Senior HSIO Bench Test Engineer
Qualcomm
At a glance
AI generatedThe Senior Silicon Validation Engineer position at Qualcomm Technologies, Inc., involves developing and executing test methodologies for high-speed SERDES interfaces such as PCIe, USB4, UFS, DP, MIPI, and DDR subsystems within the Post Silicon Engineering group. The role entails defining characterization plans to optimize design parameters and validate electrical compliance, driving first silicon bring-up and debug at external foundries, and analyzing parametric performance data across various conditions. Engineers will collaborate closely with IC Design, Systems Engineering, Customer Engineering, and Hardware Applications teams to resolve customer issues in a time-sensitive environment. The ideal candidate has 5+ years of experience in high-speed silicon validation, expertise in VLSI technologies, CMOS analog and digital circuits, and hands-on lab equipment skills including oscilloscopes and J-BERTs. Proficiency in Python/C# for test automation and strong problem-solving abilities are essential.
Skills
What you'll do
What we're looking for
Market check
This $111,300–$166,900 range sits above 32% of similar postings on FindRole.
Peer median band
$117,000–$198,000
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$135,000–$184,900
Middle half of comparable postings.
Based on 240 comparable postings.
* 240 is the maximum number of comparable postings sampled.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 595 open roles on FindRole.
Listed pay typically runs $148,300–$222,500 across 540 roles with salary data.
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