Principal Engineer Position for System Power for Advanced 2.5D/3D High-Performance Compute

Qualcomm

Actively hiring
San Diego, Ca,Us, US Posted 65 days ago $192,000–$288,000 / year
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At a glance

AI generated

TL;DR

The Qualcomm Memory Design/Technology Team is seeking a senior-level engineer to join their System PDN and power modeling group, where the candidate will assess and optimize high-performance chip and across-chiplet PDN architecture for robust computing and low-noise performance in applications like cloud, compute, mobile, and IoT. Day-to-day responsibilities include developing and validating models for power density under various workloads, identifying critical power scenarios within packaging constraints, and simulating system power behavior on different scenarios. The role requires expertise in EDA tools such as Voltus, Redhawk, SPICE, and Virtuoso, along with knowledge of signal and power integrity, chiplets, PMIC architecture, and thermal modeling. Candidates should have a Master's or Ph.D. in Electrical Engineering and experience in PDN optimization, decoupling capacitance placement, and power modeling for high-performance computing systems.

Skills

Voltus Redhawk SPICE Virtuoso C C++ Python Perl IBIS Verilog-A RLC networks EDA tools Power Integrity Signal Integrity Chiplets PMIC architecture Thermal Modeling High-Frequency Signal Assessment Model Order Reduction

What you'll do

  • Develop and optimize PDN memory and computing architectures for high-performance applications.
  • Validate power and power density models under various workloads for multiple modules.
  • Identify critical power scenarios and propose solutions within packaging constraints.
  • Simulate system power behavior across different operational states using EDA tools.
  • Floorplan 2.5/3D PDN designs considering manufacturing, testability, and performance factors.
  • Develop and utilize optimal control mechanisms for power switches in chip design.

What we're looking for

  • Experience in PDN and power modeling for high-performance chips.
  • Proficiency in EDA tools like Voltus, Redhawk, SPICE, Virtuoso.
  • Knowledge of signal and power integrity, chiplets, and PMIC architecture.
  • Ability to develop models for power density under various workloads.
  • Familiarity with thermal modeling and hotspot mitigation techniques.

Market check

Salary context

This $192,000–$288,000 range sits above 79% of similar postings on FindRole.

Peer median band

$168,000–$257,375

Median floor and ceiling across peers.

Typical midpoint (25–75%)

$186,856–$235,750

Middle half of comparable postings.

Based on 240 comparable postings.

* 240 is the maximum number of comparable postings sampled.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 569 open roles on FindRole.

Listed pay typically runs $148,300–$224,400 across 536 roles with salary data.

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View all roles at Qualcomm

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