Principal Design Verification Engineer | Microsoft Careers
Microsoft
At a glance
AI generatedThe Principal Design Engineer will join the Microsoft AISoC Silicon team, a dynamic group focused on cutting-edge artificial intelligence system-on-chip development. This senior-level position involves driving multiple facets of high-performance designs, including IP microarchitecture specification and RTL design in Verilog/SystemVerilog. Daily responsibilities encompass collaborating with architecture, verification, and physical design teams to ensure successful SoC integration across various subsystems. Ideal candidates possess extensive experience in digital design, synthesis, timing constraints, and post-silicon debug, along with a strong background in complex algorithmic designs for AI applications and scripting development. The role demands expertise in microarchitecture specification, RTL coding, clock domain crossing (CDC), and lint closure, as well as proven success in delivering IP or ASIC/SOC designs.
Skills
What you'll do
What we're looking for
Market check
This $142,800–$274,800 range sits above 65% of similar postings on FindRole.
Peer median band
$142,800–$274,800
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$178,075–$214,500
Middle half of comparable postings.
Based on 240 comparable postings.
* 240 is the maximum number of comparable postings sampled.
Employer
Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing
Microsoft currently has 451 open roles on FindRole.
Listed pay typically runs $119,800–$234,700 across 417 roles with salary data.
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