MBIST Technical Leader

Cisco

Remote

Quick summary

Work type
Remote
Location
Remote
Salary
$210,600–$305,100 / yr
Posted
2 days ago
Closes
Sep 1, 2026

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $258k
$133k most similar roles pay here $324k

This role pays more than 93% of similar roles. Most pay $160,555–$223,700 — the shaded band above. At the midpoint, this role pays about $258k versus about $192k for comparable roles.

Based on 239 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 166 open roles on FindRole.

Listed pay typically runs $168,800–$241,400 across 166 roles with salary data.

Most-posted roles

View all roles at Cisco

At a glance

TL;DR · MBIST Technical Leader

Role Posting Log in to save

As an ASIC Technical Lead-MBIST engineer in the Silicon One development organization at Cisco, you will lead the MBIST methodology for cutting-edge networking chips, designing and implementing robust, reusable MBIST architectures that are technology-agnostic. Your daily responsibilities include defining comprehensive MBIST requirements for advanced technology nodes and packages, ensuring high-quality silicon yield through strategic test planning and execution. The role requires expertise in ASIC DFT with at least 12 years of experience (or 10 years with a master’s degree), familiarity with memory architectures like SRAM and DRAM, and proficiency in industry-standard DFT tools such as Synopsys DesignWare and Mentor Graphics Tessent. Strong scripting skills in Python, TCL, or Perl for test automation are essential, along with the ability to collaborate effectively across teams and improve silicon quality. Experience in Verilog/SystemVerilog and addressing memory failure correlation in production is preferred.

Skills

Python TCL Perl Synopsys_DesignWare TestMax Mentor_Graphics_Tessent Verilog System_Verilog CI/CD

What you'll do

  • Lead the MBIST methodology for Silicon One chips.
  • Design and implement robust, reusable MBIST architecture.
  • Specify comprehensive MBIST architecture independent of technology and tools.
  • Define MBIST requirements for advanced technology nodes and packages.
  • Automate test generation and analysis using scripting languages.

What we're looking for

  • Bachelors in Electrical Engineering with 12+ years or Masters with 10+ years of ASIC DFT experience.
  • Extensive experience with memory architectures and failure modes.
  • Proficiency in industry-standard DFT tools such as Synopsys DesignWare, SMS, TestMax, Mentor Graphics Tessent.
  • Strong scripting skills (Python, TCL, Perl) for test generation and analysis automation.
  • Strategic planning and execution of complex test strategies.

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