Infra Systems Physical Architect

Qualcomm

Actively hiring
San Diego, CA Posted 145 days ago $140,000–$210,000 / year
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At a glance

AI generated

TL;DR

As an ASIC Engineer at Qualcomm Technologies, Inc., you will join the Infra Systems Architecture team as a Physical Architect, responsible for designing and optimizing Network on Chip (NoC) solutions in high-performance System-on-Chip (SoC) environments. Your daily tasks include planning and implementing NoCs with best-in-class latency, area, performance, and power efficiency, while also developing custom methodologies for synthesis, placement, routing, and clocking strategies. You will analyze functional and test mode constraints, optimize physical design aspects such as power planning and signal integrity, and leverage scripting languages like Python, Perl/TCL, and C to automate complex tasks. This role requires deep expertise in NoC implementation, AMBA protocols, cache coherency mechanisms, and formal verification techniques, with proficiency in tools like Design Compiler, Fusion Compiler, Genus, PrimeTime, and Innovus being highly beneficial.

Skills

Python TCL Linux Unix shell C Design Compiler Fusion Compiler Genus Primetime Prime Power Innovus AMBA Protocol Cache Coherency mechanisms Physical Aware Synthesis Physical Aware DFT Clock Tree Planning MESH CTS Custom Placement and Routing Formal Verification Power Domain Analysis

What you'll do

  • Design and optimize Network on Chip (NoC) architectures for high performance and low power.
  • Develop custom methodologies for implementing NoCs with best Power Performance Area (PPA).
  • Analyze and improve functional and test mode constraints for synthesis and place-and-route processes.
  • Create recipes for physical-aware synthesis, special placement strategies, and optimal floorplanning.
  • Implement advanced clocking solutions like mesh clock tree structures to reduce power consumption.
  • Optimize routing techniques to minimize wire delays and enhance signal integrity in MMMC designs.

What we're looking for

  • 5+ years of experience in NoC implementation and AMBA protocol.
  • Expertise in physical-aware synthesis, DFT, and clock tree planning (spine/mesh).
  • Proficiency in custom placement, routing, and power domain analysis.
  • Formal verification and timing analysis skills required.
  • Experience with Design Compiler, Fusion Compiler, Genus, Primetime, PrimePower, Innovus preferred.
  • Strong scripting abilities in Python, Perl/TCL, Linux/Unix shell, C.

Market check

Salary context

This $140,000–$210,000 range sits above 39% of similar postings on FindRole.

Peer median band

$147,400–$241,500

Median floor and ceiling across peers.

Typical midpoint (25–75%)

$151,757–$235,375

Middle half of comparable postings.

Based on 239 comparable postings.

* 240 is the maximum number of comparable postings sampled.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 567 open roles on FindRole.

Listed pay typically runs $148,300–$226,100 across 534 roles with salary data.

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