EMIR Engineer

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$200,000–$300,000 / yr
Posted
15 days ago
Freshness
Confirmed live yesterday
Closes
Oct 12, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $183k
This role $250k
$128k $318k
below market most similar roles pay here above market

This role pays more than 86% of similar roles. Most pay $148,250–$217,525 — the blue band above. At the midpoint, this role pays about $250k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · EMIR Engineer

JOB TITLE: EMIR Engineer As a senior EMIR CAD member, you will join the EMIR CAD team to develop and maintain world-class EMIR and Voltus flows. Your primary responsibilities include collaborating with internal experts and EDA vendors to evaluate new tool features, integrate best practices into software-designed flows, and provide tool support to global IP, SoC, and 3DIC Stacked Die design teams. You will manage tool versions, regression, and qualification while resolving bugs with vendors. The role requires technical proficiency in EMIR, Voltus, Redhawk_SC, Physical Design, and Advanced Packaging. You must possess strong scripting skills in Perl, Tcl, and Python, alongside a solid background in VLSI, CMOS fundamentals, and electrical engineering. This position focuses on improving flow methodologies and supporting new technology nodes.

What you'll do

  • Develop and maintain world-class EMIR flows using state-of-the-art EDA tools like Voltus and Redhawk_SC.
  • Provide tools and flow support to global IP, SoC, and 3DIC Stacked Die design teams.
  • Enable flow support for new technology nodes.
  • Collaborate with internal experts and EDA vendors to drive continuous flow and methodology improvements.
  • Work directly with EDA vendors to resolve tool issues and bugs.
  • Manage tool versions, regressions, and qualifications for deployment.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
  • Master's degree (preferred).
  • Technical proficiency in EMIR/Voltus with knowledge in Physical Design and Advanced Packaging.
  • Exceptional scripting skills in Perl, Tcl, and Python.
  • Extensive industrial experience in VLS/silicon design (preferred).
  • Prior experience working with EDA vendors, particularly in Gatelevel EMIR domain with Voltus/Redhawk_SC experience (preferred).
  • Solid background in VLSI and CMOS fundamentals and electrical engineering knowledge (preferred).
  • Strong analytic, problem-solving, and communication skills (preferred).

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