AI Engineer, Recursive Self-Improvement for Compute

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$204,000–$306,000 / yr
Posted
91 days ago
Freshness
Confirmed live today
Closes
Jul 28, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $208k
This role $255k
$164k $321k
below market most similar roles pay here above market

This role pays more than 92% of similar roles. Most pay $179,575–$235,750 — the blue band above. At the midpoint, this role pays about $255k versus about $208k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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At a glance

TL;DR · AI Engineer, Recursive Self-Improvement for Compute

AI Engineer, Recursive Self-Improvement for Compute joins the team to build recursive self-improvement systems for compute. This role focuses on creating agentic and learning-driven optimization loops where AI proposes, verifies, and learns from improvements to compute workloads and hardware engineering workflows. You will develop systems that generate, compile, test, benchmark, and profile candidate improvements with minimal human intervention. Key responsibilities include designing feedback systems, reward modeling, and building reusable tools for hardware-aware optimization. The role requires proficiency in Python and systems languages like C++, C, HIP, or CUDA, alongside experience with PyTorch, JAX, and reinforcement learning. You will solve complex engineering problems involving GPU and CPU performance, compilers, and automated program repair to improve latency, throughput, and power efficiency across various compute domains.

What does a AI Engineer earn in California?

Median $246150 from 100 postings across 17 companies.

See salary data

What you'll do

  • Build agentic and learning-driven optimization loops for compute workloads and hardware engineering workflows.
  • Develop systems to generate, compile, test, benchmark, and profile candidate improvements with minimal human intervention.
  • Convert high-value engineering workflows into verifiable tasks with clear graders, harnesses, and metrics.
  • Collaborate with AI researchers on reward design, reward shaping, and long-horizon optimization loops.
  • Design feedback systems that accumulate data from successful attempts, failed attempts, profiler traces, and validation logs.
  • Improve iteration speed through staged validation, caching, parallel execution, and faster feedback paths.
  • Build reusable tools and patterns that generalize across multiple compute and hardware optimization domains.
  • Mentor other engineers and set the technical direction for self-improving AI systems for compute.

What we're looking for

  • Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, Machine Learning, or related field, or equivalent practical experience.
  • Master's degree preferred; PhD is a plus, especially in AI systems, reinforcement learning, compilers, GPU computing, or hardware/software co-design.
  • Strong software engineering experience in Python and at least one systems language such as C++, C, HIP, or CUDA (preferred).
  • Experience building AI, ML, agentic, optimization, or automation systems evaluated with objective metrics (preferred).
  • Experience with GPU kernels, ROCm/HIP, CUDA, Triton, PyTorch, JAX, TensorFlow, or distributed training/inference systems (preferred).
  • Experience with reinforcement learning, post-training, reward modeling, automated program optimization, or agentic coding systems (preferred).
  • Familiarity with CPU performance engineering, compiler optimization, benchmarking, profiling, or math libraries (preferred).
  • Exposure to hardware design, simulation, formal verification, performance/power/area analysis, or hardware/software co-design (preferred).

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